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Digital Design Engineer

Texas Instruments

Experience : 4 Years

Education : ME/M.Tech, Other Course, B.Design, BE/B.Tech

Location : Bangalore

Job Role : Engineer

Posted on 22 Oct 20

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Job DescriptionLast Date 21 Dec 20

STA Lead:6/7+ years

Strong SOC timing signoff closure profile with hands-on experience on 4+ tape outs
Strong knowledge on constraints development and validation
Strong understanding of margins/derates
Should be able to create both clock and data timing ECOs Manual and tool based flows
Experience on Cadence tools (Tempus/TSO) will be added advantage
Must have strong synthesis knowledge
Multimode multi corner signoff closure experience is must

PnRreliability and physical signoff: 5/6+ years

Must have SOC level IR drop closure experience on 3+ devices
Strong SOC level physical verification expertise with minimum of 3+ tapeouts
Strong knowledge on PnR flows
Experience on Cadence tools (Voltus) will be added advantage

Minimum Requirements

6+years of relevant experience

Digital Design Engineer
Experience : 4
Job Type : Full Time
Interview Type : Face to Face Interview

Job Type : Full Time

Interview Type : Face to Face Interview

Company Description

Texas Instruments

Apply now

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