Title: Engineer Principal, R&D-Bangalore
Duties & Responsibilities:
• FPGA for high-speed real-time data processing applications
• Proficiency with VHDL and scripting languages.
• Zync Ultra scale SoC or equivalent integrated hard processor with programmable logic device.
• ARM AXI interfaces and DMA
• Model based design tools such as DSP Builder and System Generator
• Multi-gigabit design (10Gb/s Ethernet, JESD204, 10GBASE-R/KR, or similar)
• Clock domain partitioning, timing constraints rules, static timing closure
• Hierarchical test bench design
• Automated vector stimulus input and output vector pass/fail checking
• Chipscope or SignalTap debugger or equivalent methods
• Implementation knowledge in the following signal processing areas is highly desirable, Digital NCO, Quadrature Modulator and Demodulator, channel filtering, AGC and PLL and loop filters
• LTE or 5GNR Layer 1 radio implementation with end-to-end system integration experience is preferred.
• Experience in supporting product development through the entire product lifecycle is highly desirable.
• Demonstrated experience developing and integrating designs in a multi-discipline collaborative engineering environment.
Required Skills & Qualifications:
• Bachelors’ degree (CS/ECE/EEE) OR Master’s degree (CS/ECE/EEE) with 14+ years’ experience
• 5+ years relevant experience in the implementation of high-speed real-time FPGA RTL.