Front End Digital Design Engineer (Deep Learning R&D Engineer)
Job ID: JR0111348
Job Category: Engineering
Primary Location: Bangalore, KA IN
Job Type: Experienced Hire
Qualifications:
1. Masters/Bachelors in Electronics Engineering
2. Digital design skills (FPGA/ASIC),Low-power aware design , Micro-architecture design skills
3. Hardware Description Language: SystemVerilog/Verilog/SystemC
4. Scripting Languages - Perl/Python
5. Knowledge in Deep Learning would be advantageous, not mandatory
6. Team Player
Job Description:
- Looking for Front-end Digital design engineers who are conversant with RTL design using System Verilog/SystemC.
- Should be well versed with different areas of digital design, RTL coding, micro-architecture development, Low-power design techniques, simulation, synthesis, scripting.
- Should be a team player who is willing to work with Verif/Back-end/Power/Architecture teams.