Applications are invited on prescribed format for the following assignment in a purel time bound research project undertaken in the School of Electrical Sciences of this Institute
1. Name of the Temporary Assignment: Junior Research Fellow (JRF) – 1 Post
2. Name of the temporary research Project: “Design Of Dynamic MAC and PHY SoC for Low Power and Long Range networks”
3. Name of the Sponsoring Agency: Ministry of Electronics and Information Technology, Govt. of India
4. Consolidated Emolument: Rs. 31,000/‐ per month
5. Qualification: M.Tech/ M.E./ M.S. with specialization in VLSI design or IC design or related areas and B.Tech/B.E in ECE with minimum 65% marks (or 6.0/10.0 CGPA) throughout starting from class X. Valid GATE score is preferable. (OR) B.Tech/B.E. in ECE (preferably one year experience) in Analog, Mixed- Signal, RF IC Design or in related areas and with minimum 65% marks (or 6.0/10.0 CGPA) throughout starting from Class X. Valid GATE score is preferable.
6. Skills:
A. Candidates with the following skills are preferred:
B. Experience in Analog, RF, Mixed-Signal IC Design, or its related areas
C. Experience in IC design using EDA Tools like Cadence
D. Good problem-solving and communications skills
7. Period of Engagement: Initially for 1 year with possible extension depending on performance
8. Duration of the project: 3 years