DFT FrontEnd: Managing the hierarchical data model
for both RTL and no-RTL flows keeping in mind performance and capacity and all
DFT tools in mind.
The model is serialized and restored on-demand for various
Enhancing the model for changing language standards.
further, have a very powerful set of APIs dealing with test insertion which is
done on the same model, the test insertion involves connecting two
hierarchical nodes optimally by doing fan in/fanout traversals.
This model is
further written out to ensure that written out RTL [Verilog, VHDL, System
Verilog ] is format preserved