Job Reference: ENS180911A-SRFPVE : SENIOR FPGA VALIDATION ENGINEER (Bangalore, India)
Skill Set: FPGA implementation and validation of digital IP’s, Working on FPGA based Test Environment set-up.
Experience: 4+ years
No. of positions: Multiple
Background:
- 4+ years’ experience in FPGA based IP Module development and verification
- Experience in IP validation using FPGA based verification/Validation environment
- Good experience in programming languages such as Verilog, VHDL, C/C++, Perl/Python
- Experience in the area of validation of IP modules such as Port, DIO, PWM, ICU, OCU etc
- Familiarity with coverage concepts, test plans, post-Si validation environment, automation, and test writing/debug
- Experience in using lab equipment’s such as Oscilloscopes, Protocol Analyzers/Exercisers, Mid-bus Probes, Logic Analyzers, JTAG based Debuggers etc.
Role:
- Own and lead one or more functional area of microcontroller for FPGA based digital IP development and verification
- Collect requirement on FPGA based test environment and stimulus generation using FPGA based IPs
- Comprehend multi-core challenges and plan ahead to mitigate risks
- Ramp on Tri-Core and peripheral devices as well as interface bus on the Tri-Board
- Technical owner of the assigned work area
- Ramp and own one or more digital IP’s from the context of FPGA development of the corresponding IP’s
- Contribute to set-up the FPGA based Automation Environment
Personal skills :
- Excellent communication and interpersonal skills
- Strong and effective presentation skills, able to operate at multiple levels including senior management
- Self motivated
- Take ownership of problems
- Creative problem solving
- Team player
4 Years 
Salary not disclosed 
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