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Signal/Power Integrity Engineer

Western Digital
Experience : 0 to 3 Years
Location : Bangalore
Job Role : Engineer
Posted on 14 Oct 20
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Job DescriptionLast Date 07 Dec 20
Signal/Power Integrity Advanced Engineer for PCB Design SI/PI Analysis in India

Description
  • Power and Signal Integrity analysis of complex Packages & PCBs
  • PCB design guidelines using signal/power integrity considerations
  • Stackup parameters and material analysis
  • High speed traces structures recommendations for SerDes interfaces
  • PCB routing visual inspection using SI/PI rules and design guidelines
  • S-Parameter model extraction and validation of design targets
  • Simulation of memory and SerDes interfaces with Hspice and Keysight ADS
Requirement
  • Knowledge of Signal and Power Integrity fundamentals
  • Experience in board and package level SI/PI Simulations
  • Proven ability to use modern tools for S-parameter extraction
  • System level SI simulation using simulation tools
  • Understanding of functionality of different I/Os
  • Tools Used: Cadence PowerSI/ Agilent ADS/ Mentor Nimbic/Allegro SIP/Ansys HFSS
  • Expertise in circuit simulation with different tools such as Hspice and ADS
  • Exposure to High speed interfaces such as PCIe, USB, LPDDR4 etc
  • 6-8 years of experience in SI/PI area
Additional Skills
  • Knowledge in analog design or other field of HW design
  • Modeling of electrical circuits
  • Programming language perl, tcl, python
  • Ability to work in multi team environment
Scope
  • Signal Integrity Analysis: Analysis of PCB design, S-parameter extraction of PCB design, board level simulation for signal traces to extract system performance parameters such as eye-diagram, BER, Jitter etc, analyzing effects of cross coupling, simultaneous switching noise etc on performance of the system, improving system performance by suggesting modifications in the board topology and routing of nets
  • Power Integrity Analysis: analysis of PCB power distribution network, extraction of Z-parameter of power distribution network, improving the performance of power distribution network by optimizing decoupling capacitors at suitable points in the network, final system level simulation to measure and optimize system performance
  • Signal/Power Integrity Engineer
  • Experience : 0 to 3
  • Job Type : Full Time
  • Interview Type : Face to Face Interview


Job Type : Full Time
Interview Type : Face to Face Interview
Company Description
Western Digital
Apply now
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