Job Id:E1977252
Job Title: Digital Verification Engineer / Lead
Job Area: Engineering - Verification
Location: India - Bangalore
Minimum Qualifications:
- Minimum Bachelors degree in Electrical Engineering or Computer Engineering
- 5-12 years, preferably with product organizations
- Working knowledge of Object-Oriented System Verilog principles using UVM/OVM/VMM methodologies.
Preferred Qualifications:
- Extensive hands on experience in testbenches using UVM methodology
- Experience in writing Test Plans independently
- Experience with debugging RTL & Gate level simulations
- Experience with Functional Coverage/Code Coverage
- Experience with Scripting in perl,python,tcl -Experience with Silicon Debug a plus
- Experience with Mixed Signal Designs a plus
- Part of multiple tapeouts with high quality verification.
- Education Requirements Required: Bachelor's, CS or EE. Preferred: Master's, CS or EE