AMD jobs - Verification Engineer

What you do at AMD changes everythingAt AMD, we push the boundaries of what is possible. We believe in changing the world for the better by driving innovation in high-performance computing, graphics, and visualization technologies building blocks

What You Do At AMD Changes Everything

At AMD, we push the boundaries of what is possible. We believe in changing the world for the better by driving innovation in high-performance computing, graphics, and visualization technologies building blocks for gaming, immersive platforms, and the data center.

Developing great technology takes more than talent: it takes amazing people who understand collaboration, respect, and who will go the extra mile to achieve unthinkable results. It takes people who have the passion and desire to disrupt the status quo, push boundaries, deliver innovation, and change the world. If you have this type of passion, we invite you to take a look at the opportunities available to come join our team.

The Person

Candidates should have solid track record of working on complex designs with hands on experience on architecting and developing test-bench, test-bench components, test-planning and execution of test plan, coverage development and closure. Candidate should have working experience with global teams spread across different geography and time-zones.

Key Responsibilities

• Working with all stakeholders such as lead architects and block design teams to understand features to be implemented and verified.
• Develop and maintain verification models and test bench for design verification
• Mentoring Juniors
  
  

Requirements

• ASIC Design verification experience 10 to 14 years
• Knowledge in ASIC design process, digital design, verification lifecycle,tools and methodologies
• Prior experience on full-chip or sub-system level verification is desired
• Hands-on experience in Verilog, System Verilog, C, C++ and UVM
• Power Aware verification with UPF/CPF is a plus
• Excellent debugging & investigative skills.
• Able to prepare a comprehensive test plan based on the specification & interactions with Architecture & RTL teams
• Knowledge of Constraint-Random, coverage-driven verification environments development in System Verilog / C ++ (drivers / monitors, constraint random tests, checkers and self-checking models and coverage models written in System Verilog-Covergrourp / SVA)
• Knowledge of simulation tools and coverage database visualization tools
• Scripting programming skills (Perl, Python and/or TCL)
• Hands on experience in developing verification models
• Highly motivated, self-starter with good interpersonal skills and a strong team player
• Excellent communication, critical thinking and problem-solving skills
  
  

Preferred Experience

• Strong understanding the design and verification life cycle.
• Hands on experience in developing verification models
• Hands on experience with coverage planning, coding and coverage closure.
• Should have worked on developing test plans at module/IP Level/chip-level for the project
• Experience in Graphics IP verification
  
  

Academic Credentials

B.E./B.Tech in ECE, Electrical engineering or PhD / Masters degree preferred with emphasis in Electrical/Electronics Engineering, Computer Engineering. Preferred VLSI major in Post-graduation